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Member of Technical Staff, ASIC Design Engineer

LumotiveSan Jose, California
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Job Description

Lumotive is pioneering the era of programmable optics—where light is controlled as intelligently and flexibly as software.
 
At the heart of this transformation is a once-in-a-generation innovation: a flat CMOS-based “general purpose optic.” Lumotive’s Light Control Metasurface (LCM™) beam forming chips can be programmed to function as a beam steering mirror, a lens, mirror, a beam splitter—or any optical function—replacing bulky and mechanical optical components with a fully digital, reconfigurable semiconductor . This breakthrough lays the foundation for a massive shift in multiple technologies—from 3D sensing and imaging to optical networking, free space optical communication, and beyond. Like the shift from analog to digital in electronics, programmable optics will reshape industries from robotics, self-driving cars, AI, defense, and healthcare.
Lumotive’s first commercial application is in LiDAR, where its software-defined beam steering chips are already enabling compact, high-performance, solid-state sensors. These sensors are being deployed today in smart infrastructure, robotics, and mobility systems through leading module makers and solution integrators.

With more than 200 patents and growing commercial traction, Lumotive is delivering the world’s first digital platform for light—and redefining what’s possible in the optical age.

Job Description:

Lumotive is seeking a talented and experienced ASIC Design Engineer to lead the design and implementation of Beam steering Mixed Signal ASIC Controllers. The ideal candidate is a self-motivated and quick learner who thrives in a fast-paced, cross-functional environment and brings deep expertise in RTL design for mixed-signal SoCs.

Responsibilities:

    • Design and implement RTL for complex Mixed Signal ASIC SoCs.
    • Develop and integrate ARM-based processor subsystems and SoC interconnect fabrics.
    • Drive architecture, microarchitecture, and RTL development of digital logic blocks.
    • Collaborate closely with analog/mixed-signal, verification, DFT, and physical design teams.
    • Perform logic synthesis, DFT insertion, STA, and generate timing constraints.
    • Run and resolve issues from LINT, CDC, and Formal Verification tools.
    • Support post-silicon validation and bring-up activities as needed.

Qualifications:

    • BSEE or MSEE in Electrical Engineering or related field.
    • 5+ years of hands-on experience in RTL design, preferably in Display Controllers, Touch Controllers, Wired/Wireless Communication Systems and Automotive Sensor Communication Systems.
    • Strong experience in developing ARM-based processor subsystems and SoC fabrics.
    • Strong expertise in Verilog and SystemVerilog.
    • Solid understanding and practical experience with CDC (Clock Domain Crossing), LINT tools, Synthesis, Formal Verification, and Static Timing Analysis (STA).
    • Experience with design for testability (DFT), scan insertion, and ATPG.
    • Proficiency in scripting languages such as Python or Perl.
    • Experience working at both block-level and full-chip integration.
    • Experience in DSP (Digital Signal Processing) design.
    • Knowledge of analog/mixed-signal interaction and integration.
    • Familiarity with industry-standard EDA tools (Synopsys, Cadence, Siemens/Mentor).
    • Experience in low-power design techniques.

$170,000 - $180,000 a year
Base pay is scaled depending on experience  + Performance based Quarterly Bonus + Equity. 
Benefits include but not limited to:

Health, dental and vision
FSA, HSA
PTO plus 14 paid company holidays
401K with 3% contribution
Stock Options
Life insurance and disability