Application Engineering Director - IC Design Verification

CadenceSan Jose, CA

$157,500 - $292,500 / year

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Overview

Schedule

Full-time

Career level

Director

Compensation

$157,500-$292,500/year

Benefits

Health Insurance

Dental Insurance

Vision Insurance

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

At Cadence, we hire and develop innovators and leaders who want to make an impact on the world of technology.

We offer amazing opportunities to grow, no matter where you are in your career. The ideal candidate will be energetic, innovative and enthusiastic about how to help customers solve their toughest verification problems using Cadence technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune magazine and Great Place to Work as one of the World's Best Workplaces year after year!

As an key leader managing the Field Applications Engineering (AE) Team here in the Bay Area for key strategic accounts, you will work directly with industry leading semiconductor and system companies to deploy Cadence's market leading verification platforms including cutting edge technologies using AI assistants, Agentic AI and machine learning. In this customer facing role you will provide the front line technical support in the pre and post-sales process and will work with the account team to come up with innovative solutions to address our customers' most challenging problems in verification. You will own customer success!

In this role, you will lead the AE team to have a comprehensive understanding of the customer specific verification requirements, including methodology support, and operation and maintenance of Cadence's verification tools and services. You will lead the team to support key technical evaluations for Cadence's market leading tools such as Xcelium simulation platform and Verisium platform of AI and ML tools for enhanced verification. As a part of this role you will also assist with technical presentations and product demonstrations for customers to show the value proposition with our tools.

At Cadence, customers are at the heart of everything we do. Talented engineers like you are what enable us to materialize this passion into results. By working directly with Cadence R&D and driving customer engagements, you will enhance your in-depth knowledge in verification tools, unlock unique expertise in verification methodologies, and level up your communication, customer, and sales skills.

Key responsibilities:

Establish technical credibility and rapport with the customer and become the go-to expert for all of their technical inquiries and support
In collaboration with R&D, provide in-depth technical assistance working closely with your team to help support advanced verification flows and AI/ML applications to secure design wins
Champion the customer needs and work closely with R&D and marketing to develop competitive and creative technical solutions
Understand the competitive landscape and continuously work on differentiating Cadence's solutions

Minimum requirements:

BS, MS, or PhD degree in Computer Science/Engineering, Electrical Engineering, or related field

15+ years experience in the semiconductor industry
Have a good understanding and working knowledge with SystemVerilog, Verilog and UVM testbench architecture
Strong verbal and written communication skills
Digital design experience and Knowledge of design fundamentals such as architecture & micro-architecture
Ability to interact effectively with both external customers and internally with the AE and R&D teams

The annual salary range for California is $157,500 to $292,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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FAQs About Application Engineering Director - IC Design Verification Jobs at Cadence

What is the work location for this position at Cadence?

This job at Cadence is located in San Jose, CA, according to the details provided by the employer. Some roles may also include multiple work locations depending on the requirement.

What pay range can candidates expect for this role at Cadence?

Candidates can expect a pay range of $157,500 and $292,500 per year.

What employment applies to this position at Cadence?

Cadence lists this role as a Full-time position.

What experience level is required for this role at Cadence?

Cadence is looking for a candidate with "Director" experience level.

What benefits are offered by Cadence for this role?

Cadence offers following benefits: Health Insurance, Dental Insurance, Vision Insurance, Paid Vacation, 401k Matching/Retirement Savings, and Health & Wellness Programs for this position. Actual benefits may vary depending on the employer's policies and employment terms.

What is the process to apply for this position at Cadence?

You can apply for this role at Cadence either through Sonara's automated application system, which helps you submit applications 10X faster with minimal effort, or by applying manually using the direct link on the job page.