A logo

Core Engineering - Design Engineer III

Artech LLCSunnyvale, CA

$80 - $87 / hour

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.1

Reclaim your time by letting our AI handle the grunt work of job searching.

We continuously scan millions of openings to find your top matches.

pay-wall

Overview

Remote
On-site
Compensation
$80-$87/hour

Job Description

Location:

Onsite 3 days in Sunnyvale, CA

Salary Range:

Max pay rate: upto $80/hr on W2. 

Introduction

We are seeking a Power Measurement Design Verification Engineer to develop and execute DV test strategies focused on power and performance characterization at the IP and SoC level. This role is critical to enabling accurate pre-silicon power estimation, driving power optimization decisions, and maintaining automated power reporting infrastructure.

Required Skills & Qualifications

  • Proven SystemVerilog UVM verification experience (testbench architecture, sequences, drivers/monitors).
  • Functional coverage, constrained-random, and assertion-based verification (SVA); coverage closure.
  • Strong RTL debug with industry simulators (VCS / Xcelium / Questa) and waveform tools (Verdi).
  • Working knowledge of RTL design principles and digital design fundamentals.
  • Proficiency in Python (or Perl) scripting for automation.
  • Prior work experience at client or in client's industry.

Applicants must be able to work directly for Artech on W2.

Preferred Skills & Qualifications

  • Experience with power measurement tools — PrimeTime PX (PTPX) or equivalent (e.g., PrimePower).
  • Low-power / power-aware verification (UPF, power-aware sim) in advanced nodes (7nm and below).
  • Formal verification and/or emulation (Palladium / Zebu) experience.
  • Familiarity with the RTL-to-GDSII flow.
  • Data analysis / ML approaches for coverage or debug triage.

Day-to-Day Responsibilities

  • Develop and execute verification plans for RTL blocks/IPs across the subsystem.
  • Build and maintain SystemVerilog/UVM testbenches; write directed and constrained-random tests.
  • Drive functional coverage and assertion (SVA) closure; run and triage regressions.
  • Perform power/performance measurement across design stages using PPA RTL, PtPx tool; correlate results with post silicon and feedback to design/power-modeling teams.
  • Debug RTL failures (waveform/Verdi) and provide actionable feedback to the design team/verification team.
  • Contribute to automation of verification/regression and power/performance measurement flows (Python).

Company Benefits & Culture

  • Collaborative work environment with a focus on innovation and technology.
  • Opportunities for professional growth and development.
  • Supportive team culture with a commitment to diversity and inclusion.

For immediate consideration please click APPLY to begin the screening process with Alex. Share your resume at aditya.singh3@artech.com

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.

pay-wall

FAQs About Core Engineering - Design Engineer III Jobs at Artech LLC

What is the work location for this position at Artech LLC?
This job at Artech LLC is located in Sunnyvale, CA, according to the details provided by the employer. Some roles may also include multiple work locations depending on the requirement.
What pay range can candidates expect for this role at Artech LLC?
Candidates can expect a pay range of $80–$86.66 per hour for this role.
What employment applies to this position at Artech LLC?
The employer has not provided this information. This may be discussed during the hiring process.
What is the process to apply for this position at Artech LLC?
You can apply for this role at Artech LLC either through Sonara's automated application system, which helps you submit applications 10X faster with minimal effort, or by applying manually using the direct link on the job page.