B logo

CPU Design Architect / Principal Digital Design Engineer

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.1

Reclaim your time by letting our AI handle the grunt work of job searching.

We continuously scan millions of openings to find your top matches.

pay-wall

Overview

Schedule
Full-time
Education
Engineering (PE)
Career level
Senior-level

Job Description

Job Description:Design cost effective controller with high performance, low power and small area for cellular modem. This position will work with multi-nation teams in leading-edge process node and be involved in: - Perform CPU development and design integration for MIPS CPU subsystem.  - Explore latest technologies and be responsible for conducting fundamental research on new directions in CPU architecture  - Contribute ideas for advanced CPU performance features - analyze workloads in details, identify performance bottlenecks and opportunities, bring a data driven approach to tradeoffs in CPU design, derive architecture and micro-architecture to design/model implantation team, and bring ideas to successful silicon

Minimum Qualifications: - Master Degree in Electrical Engineering, Computer Science or Computer Engineering. - At least 5 years of CPU related Architect/RTL/Verification/Implementation design experience  - Knowledge and practical experience with common RISC CPU architecture. - Familiarity with chip digital design flow, including RTL integration, simulation, STA. - Understanding of high performance techniques and trade-offs in a CPU microarchitecture  - Ability to problem solve and prove own ideas 

Preferred Qualifications:- PhD in Electrical Engineering, Computer Science or Computer Engineering is a PLUS - 8+ years of CPU related Architect/RTL/Verification/Implementation design experience  - Strong CPU architecture knowledge and micro-architecture knowledge  - Familiarity with Symmetric Multi-processing (SMP) and Snoop-based multi-processor architecture. - Familiarity with synthesis, power analysis and post silicon debugging - Cross-site working experience is a PLUS. - Common knowledge in modeling/DV/OS is a PLUS. - Experience with Foundry, Post-Silicon, FPGA, DVT, SLT debug is a PLUS.

#LI-DNI

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.

pay-wall

FAQs About CPU Design Architect / Principal Digital Design Engineer Jobs at Baidu USA

What is the work location for this position at Baidu USA?
This job at Baidu USA is located in Sunnyvale, California, according to the details provided by the employer. Some roles may also include multiple work locations depending on the requirement.
What pay range can candidates expect for this role at Baidu USA?
Employer has not shared pay details for this role.
What employment applies to this position at Baidu USA?
Baidu USA lists this role as a Full-time position.
What experience level is required for this role at Baidu USA?
Baidu USA is looking for a candidate with "Senior-level" experience level.
What education level is required for this job?
The education requirement for this position is Engineering (PE). Candidates with relevant qualifications or equivalent experience may also be considered.
What is the process to apply for this position at Baidu USA?
You can apply for this role at Baidu USA either through Sonara's automated application system, which helps you submit applications 10X faster with minimal effort, or by applying manually using the direct link on the job page.