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HW Engineering Intern - PCB Layout Automation & AI Tooling

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Overview

Schedule
Part-time
Career level
Senior-level
Remote
Hybrid remote
Benefits
Career Development

Job Description

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration.

We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI.

Hardware Engineering Intern- PCB Layout Automation & AI Tooling

Hybrid, working onsite at our Santa Clara office 3 days per week.

12 Week Program: June 1st- August 21st or June 22nd- September 11th

Team: Hardware Systems Engineering

About the Role

At d-Matrix, we are building the future of AI compute. To do that faster, we need to rethink how hardware is designed. We are looking for a forward-thinking Hardware Engineering Intern to join our team and focus on the cutting edge of EDA (Electronic Design Automation) and AI-driven layout.

Your mission will be to evaluate, integrate, and automate PCB layout workflows using emerging AI-agent technologies and generative AI design tools. You will bridge the gap between traditional hardware design and the future of automated, agentic workflows.

Key Responsibilities

  • AI Tool Evaluation: Lead the internal evaluation of AI-driven layout platforms.
  • Benchmarking their ability to handle high-speed constraints, complex stack-ups, and power delivery requirements against traditional manual routing.
  • Workflow Automation: Develop scripts (Python, SKILL, or TCL) to bridge the gap between d-Matrix's standard EDA tools (Cadence Allegro/OrCAD) and AI layout agents.
  • PCB Design Support: Assist Senior Layout Engineers in preparing design data (schematics, netlists, and constraint files) for automated routing engines.
  • Constraint Translation: Work on "translating" complex hardware constraints (differential pairs, length matching, and Z_{target} for PDN) into formats that AI agents can ingest and execute accurately.
  • Performance Analysis: Conduct post-layout analysis on AI-generated designs, comparing Signal Integrity (SI) and Power Integrity (PI) metrics against human-designed baselines.

Required Qualifications

  • Current Student: Pursuing a BS, MS, or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
  • PCB Fundamentals: Basic understanding of PCB design flow (Schematic -> Layout -> Fabrication) and familiarity with at least one EDA tool (Allegro, Altium, or KiCad).
  • Programming Skills: Strong proficiency in Python. Experience with APIs, data parsing (JSON/XML), or automated tool-chaining is highly preferred.
  • First-Principles Thinking: A passion for challenging the status quo of "how things have always been done" in hardware design.

Preferred Skills

  • Familiarity with AI/ML concepts, particularly Reinforcement Learning or Generative Models applied to physical design.
  • Experience with GitHub and version control for hardware projects.
  • Exposure to high-speed design concepts (PCIe, DDR, SerDes).

The "d-Matrix" Internship Experience

You will be working on a project that has the potential to fundamentally change our hardware development velocity. You'll be mentored by industry veterans who have scaled AI infrastructure at companies like Google, Nvidia, META and Broadcom, while getting hands-on experience with the newest startups in the EDA space.

Equal Opportunity Employment Policy

d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We're committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.

d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.

Automate your job search with Sonara.

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FAQs About HW Engineering Intern - PCB Layout Automation & AI Tooling Jobs at D-Matrix

What is the work location for this position at D-Matrix?
This job at D-Matrix is located in Santa Clara, CA, according to the details provided by the employer. Some roles may also include multiple work locations depending on the requirement.
What pay range can candidates expect for this role at D-Matrix?
Employer has not shared pay details for this role.
What employment applies to this position at D-Matrix?
D-Matrix lists this role as a Part-time position.
What experience level is required for this role at D-Matrix?
D-Matrix is looking for a candidate with "Senior-level" experience level.
What is the process to apply for this position at D-Matrix?
You can apply for this role at D-Matrix either through Sonara's automated application system, which helps you submit applications 10X faster with minimal effort, or by applying manually using the direct link on the job page.