RTL Design Engineer - Intermediate (Us)
Tech Providers Inc.Santa Clara, CA
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Job Description
Hands-on RTL design and development using SystemVerilog / Verilog FPGA-based design including simulation, synthesis, and implementation Strong experience with Xilinx/AMD Vivado tool flow Integration of high-speed interfaces such as PCIe, DDR, Ethernet, and AXI Pre-silicon verification and post-silicon validation/debug TCL and Python scripting for automation and build flows
Automate your job search with Sonara.
Submit 10x as many applications with less effort than one manual application.