Z logo

Senior Electrical Engineer (FPGA / High-Speed / Mixed-Signal)

Zealogics.comSan Jose CA, CA

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.1

Reclaim your time by letting our AI handle the grunt work of job searching.

We continuously scan millions of openings to find your top matches.

pay-wall

Overview

Schedule
Full-time
Education
Engineering (PE)
Career level
Senior-level
Remote
On-site
Benefits
Career Development

Job Description

Key Responsibilities1. FPGA-Based System Architecture•Define FPGA-centric system architectures for high-throughput data processing platforms•Partition functionality across FPGA, ADC/DAC, and host interfaces•Collaborate with FPGA/FW teams on interface definition, timing, and performance2. High-Speed Digital & SerDes Design•Design and integrate high-speed interfaces including:oDDR4/DDR memory subsystemsoPCIe Gen3/Gen4 interfacesoQSFP (10G/25G/40G/100G) linkso10G+ SerDes channels•Define routing constraints, stack-up, and impedance control•Ensure signal integrity, timing closure, and link stabilityPublic3. Mixed-Signal & Analog Front-End Design•Design and integrate:oHigh-speed ADC/DAC signal chainsoData Converter Architectures (DCA)oPrecision analog front-end (AFE) circuits•Develop circuits using low-noise OpAmps, filters, and gain stages•Optimize performance metrics such as SNR, ENOB, bandwidth, and jitter sensitivity4. Power System Design•Design multi-rail DC/DC power systems for FPGA and high-speed circuits•Manage power sequencing, noise, ripple, and efficiency•Ensure power integrity for sensitive ADC and high-speed SerDes subsystems5. Hardware Design & PCB Implementation•Own schematic design and hardware architecture (Xpedition preferred)•Guide PCB layout for high-layer-count, high-speed boards•Lead design reviews focusing on SI/PI/EMI risks•Ensure manufacturability (DFM) and testability (DFT)6. System Bring-up & Debug•Lead board bring-up and system integration:oDDR trainingoPCIe and SerDes link-upoADC performance validation•Debug issues related to:oSignal integrityPublicoJitter and noiseoPower coupling and system interaction•Use lab tools such as oscilloscopes, TDR/VNA, and protocol analyzers7. Cross-Functional Collaboration•Work closely with FPGA, firmware, software, mechanical, and system engineering teams•Align electrical design with system-level performance requirements•Drive cross-domain trade-offs8. Technical Leadership•Lead architectural decisions and technical reviews•Mentor junior engineers in high-speed and mixed-signal design•Drive structured problem-solving across complex systemsRequired Qualifications•Bachelor’s or Master’s degree in Electrical Engineering or related field•8–12+ years of experience in high-speed, FPGA, or mixed-signal systemsCore Technical Requirements•FPGA-based system design experience•DDR4 memory subsystem design experience•PCIe / SerDes / high-speed link experience•ADC and analog front-end design experience•DC/DC power system design experienceFundamentals•Strong understanding of:PublicoSignal Integrity (SI)oPower Integrity (PI)oHigh-speed timing and jitter analysisPreferred Qualifications•Hands-on experience with FPGA platforms (Intel / Xilinx)•Experience with:oHigh-speed data convertersoOptical interfaces / QSFP modulesoJESD204 or similar high-speed data links•Strong PCB design experience with high-speed constraints•Experience with tools such as:oXpedition (Mentor / Siemens)oSI/PI analysis toolsStrong Plus•Experience in semiconductor equipment, imaging, or instrumentation systems•Experience with multi-board or modular systems•Understanding of signal-power-thermal coupling effects•Full product lifecycle experience (R&D → NPI → production)Soft Skills•Strong ownership mindset and accountability•Ability to solve complex multi-domain engineering problems•Excellent communication and cross-functional collaboration skills

Powered by JazzHR

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.

pay-wall

FAQs About Senior Electrical Engineer (FPGA / High-Speed / Mixed-Signal) Jobs at Zealogics.com

What is the work location for this position at Zealogics.com?
This job at Zealogics.com is located in San Jose CA, CA, according to the details provided by the employer. Some roles may also include multiple work locations depending on the requirement.
What pay range can candidates expect for this role at Zealogics.com?
Employer has not shared pay details for this role.
What employment applies to this position at Zealogics.com?
Zealogics.com lists this role as a Full-time position.
What experience level is required for this role at Zealogics.com?
Zealogics.com is looking for a candidate with "Senior-level" experience level.
What education level is required for this job?
The education requirement for this position is Engineering (PE). Candidates with relevant qualifications or equivalent experience may also be considered.
What benefits are offered by Zealogics.com for this role?
Zealogics.com offers Career Development for this position. Actual benefits may vary depending on the employer's policies and employment terms.
What is the process to apply for this position at Zealogics.com?
You can apply for this role at Zealogics.com either through Sonara's automated application system, which helps you submit applications 10X faster with minimal effort, or by applying manually using the direct link on the job page.