Nvidia logo

Senior Speed Characterization Engineer - Silicon Co-Design Group

NvidiaSanta Clara, CA

$136,000 - $264,500 / year

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.1

Reclaim your time by letting our AI handle the grunt work of job searching.

We continuously scan millions of openings to find your top matches.

pay-wall

Overview

Schedule
Full-time
Education
Engineering (PE)
Career level
Senior-level
Remote
Hybrid remote
Compensation
$136,000-$264,500/year
Benefits
Paid Vacation

Job Description

NVIDIA silicon runs the world's AI infrastructure. The frequency it delivers across every voltage, process corner, and workload is not assumed. It is measured, correlated, and validated. This role does that work. The Silicon Co-Design Group is where architecture intent becomes silicon reality. We own the boundary between what was designed and what was built, and we are the team that knows the difference. When a program ships at frequency and at quality, this team is a reason why.

You will be the person who follows through between simulation and silicon. When the model is wrong, a frequency corner that doesn't hold, a Vmin that walks, a critical path that timing analysis missed, you find out why, and your data is what the rest of the program acts on. Architecture, design, and product teams do not guess. They use your numbers. The engineers who do this well are rare. They think like circuit designers, work like experimentalists, and reason like data scientists. If that is you, read on.

What you'll be doing:

  • Own silicon speed characterization from first power-on through production sign-off, covering frequency, Vmin, Vmax, and timing margins across the full PVT space.

  • Close the correlation gap. Tie pre-silicon timing analysis and critical path predictions to measured silicon, quantify where the model diverges from reality, and produce analysis that architecture and design can act on with confidence.

  • Trace failures to their source, whether a microarchitectural bottleneck, a critical path that doesn't close under voltage, a clocking issue, or a process corner the model didn't anticipate, and drive the resolution.

  • Own and build AI agents that work at your direction: automated test orchestration, intelligent data pipelines, and analysis flows that expand coverage and compress cycle time without sacrificing difficulty. Know where AI accelerates real work and where it introduces risk.

  • Sit at the decision table. Your data surfaces tradeoffs across architecture, VLSI, ASIC, firmware, and product teams. Your analysis is what settles calls.

What we need to see:

  • BS or MS in Electrical Engineering, Computer Engineering, or Systems Engineering, or equivalent experience.

  • 5+ years with hands-on silicon: bring-up, post-silicon speed validation, frequency characterization, or timing analysis on real hardware.

  • Strong computer architecture fundamentals including pipeline structures, clocking, memory hierarchies, and how microarchitectural decisions propagate into frequency and power.

  • Depth in static timing analysis, critical path identification, and the ability to read and reason about timing reports at the block and chip level.

  • Enough design intuition to know what you're measuring and enough statistical fluency to know what the data means.

  • Proficiency in silicon margining, guard-banding, and PVT/binning dependencies.

  • Scripting depth in Python, Perl, or C/C++. You build the tools your work depends on.

Ways to stand out from the crowd:

  • You've closed the prediction-to-silicon loop with a correlation methodology precise enough that other teams adopted it.

  • You've traced a frequency miss to a specific critical path, microarchitectural interaction, or process corner and driven the fix all the way through.

  • Built or deployed AI-driven flows for characterization or analysis, and can speak to both the outcome and the guardrails you put in place.

  • Background is in datacenter-scale or high-performance silicon and you know how complexity at scale changes the failure landscape and raises the cost of being wrong.

The chips you characterize run the world's AI infrastructure. The engineers who do this work don't just report what the silicon does, they define what it can become. If that's the level you want to operate at, we want to hear from you.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the world's most desirable employers in the technology field. We encourage you to join our team, which consists of some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about joining an outstanding team supporting the latest in GPU and AI technology? If so, we want to hear from you.

#LI-Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until July 31, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.

pay-wall

FAQs About Senior Speed Characterization Engineer - Silicon Co-Design Group Jobs at Nvidia

What is the work location for this position at Nvidia?
This job at Nvidia is located in Santa Clara, CA, according to the details provided by the employer. Some roles may also include multiple work locations depending on the requirement.
What pay range can candidates expect for this role at Nvidia?
Candidates can expect a pay range of $136,000 and $264,500 per year.
What employment applies to this position at Nvidia?
Nvidia lists this role as a Full-time position.
What experience level is required for this role at Nvidia?
Nvidia is looking for a candidate with "Senior-level" experience level.
What education level is required for this job?
The education requirement for this position is Engineering (PE). Candidates with relevant qualifications or equivalent experience may also be considered.
What benefits are offered by Nvidia for this role?
Nvidia offers Paid Vacation for this position. Actual benefits may vary depending on the employer's policies and employment terms.
What is the process to apply for this position at Nvidia?
You can apply for this role at Nvidia either through Sonara's automated application system, which helps you submit applications 10X faster with minimal effort, or by applying manually using the direct link on the job page.