Silicon Photonic IC (PIC) Design Engineer

PhizenixSanta Clara, California

$185,000 - $225,000 / year

Apply with Sonara

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.¹

Reclaim your time by letting our AI handle the grunt work of job searching.

We continuously scan millions of openings to find your top matches.

Overview

Schedule

Full-time

Education

Engineering (PE)

Career level

Senior-level

Compensation

$185,000-$225,000/year

Job Description

About the Role

We are seeking a highly skilled Silicon Photonic IC Design Engineer to play a key role in the design and physical layout of advanced Silicon Photonic Integrated Circuits (PICs) that interface directly with custom ASICs built on leading-edge semiconductor process nodes. This position offers the opportunity to work at the intersection of photonics, analog, and digital design — helping to define and deliver next-generation optical and electronic systems.

Key Responsibilities

Contribute to the design and physical layout of complex Silicon Photonic ICs (PICs) that connect directly with advanced ASICs.
Participate in all stages of PIC delivery — from floor planning and block placement to micro-architecture, optical/electrical routing, and back-end verification (DRC/LVS).
Collaborate with analog, digital, and packaging teams to ensure optimal design outcomes that meet requirements for opto-electronic performance, signal integrity (SI), and power integrity (PI).
Work closely with other photonics engineers to refine layout methodologies, improve design automation, and enhance existing software-based verification and layout flows.

Qualifications

Specialized Skills

Strong understanding of photonics fundamentals and core engineering design principles.
Hands-on experience with Silicon Photonics Process Design Kits (PDKs) and best practices for designing and laying out photonic components, subsystems, and complete PICs.
Proficiency with physical design tools such as Cadence, Siemens Mentor, or Klayout, including scripting and automation using SKILL or Python.
Familiarity with layout verification tools (e.g., Calibre, Pegasus) for DRC, ERC, and LVS checks.
Experience with SI and PI-aware electrical routing for mixed-signal and digital designs is a strong advantage.

Education

Ph.D. in Electrical Engineering, Physics, or a related field with a focus on integrated photonics or optical device design.

Preferred Attributes

Highly self-motivated with a proactive approach to problem-solving.
Creative thinker with strong attention to detail.
Thrives in a collaborative and fast-paced environment.
Excellent written and verbal communication skills.

California Pay Range

$185,000 - $225,000USD

Automate your job search with Sonara.

Submit 10x as many applications with less effort than one manual application.

Apply with Sonara Apply manually

FAQs About Silicon Photonic IC (PIC) Design Engineer Jobs at Phizenix

What is the work location for this position at Phizenix?

This job at Phizenix is located in Santa Clara, California, according to the details provided by the employer. Some roles may also include multiple work locations depending on the requirement.

What pay range can candidates expect for this role at Phizenix?

Candidates can expect a pay range of $185,000 and $225,000 per year.

What employment applies to this position at Phizenix?

Phizenix lists this role as a Full-time position.

What experience level is required for this role at Phizenix?

Phizenix is looking for a candidate with "Senior-level" experience level.

What education level is required for this job?

The education requirement for this position is Engineering (PE). Candidates with relevant qualifications or equivalent experience may also be considered.

What is the process to apply for this position at Phizenix?

You can apply for this role at Phizenix either through Sonara's automated application system, which helps you submit applications 10X faster with minimal effort, or by applying manually using the direct link on the job page.