SoC Design Engineer
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Overview
Schedule
Full-time
Education
Engineering (PE)
Career level
Senior-level
Remote
On-site
Compensation
$156,853-$160,000/year
Job Description
Description
Job Title: SoC Design Engineer
Job Duties:
Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical design teams on floor-planning, timing closure, and DFT implementation. Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and mixed-signal integration. Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline according to PRD/design specification and system architecture of SoC products, following ASIC design flow: coding, simulation, synthesis, static timing analysis, formality verification, DFT, using Simvision, EDA tools such as Prime Time, cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc. Conduct design verification and modeling using SVA, Python, Perl, C++/C, and HLS. Work with digital and analog engineers for system design, integration and validation. Work with algorithm engineers for module level design, including hardware C model implementation, micro architecture design, RTL design and hardware/software co-simulation. Work with algorithm and application engineers for project-based microarchitecture improvements. Conduct silicon validation, debugging and tuning.
Requirements:
Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or a related field.
Required skills and/or academic training in the following:
- Arithmetic circuit design related to general datapath circuits, ML and AI circuits.
- Arithmetic circuit design, timing analysis; synchronous and asynchronous FSMs; power, test, and debug.
- Design and design debug with System Verilog; Logic design and analysis.
- Processing Subsystem, including superscalar out-of-order cores, multicore and heterogeneous processors, and purpose-specific accelerators.
- Design tools, such as microarchitecture simulators, RTL synthesis tools, and modeling for area, power, and thermal.
- FPGA platforms to compute acceleration.
- FPGAs technology, architecture and applications.
- Register-Transfer Level (RTL) hardware design.
- Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks.
- Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal chip design.
- Full-chip integration and verification for tapeout.
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.
Automate your job search with Sonara.
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FAQs About SoC Design Engineer Jobs at Omnivision
What is the work location for this position at Omnivision?
This job at Omnivision is located in Santa Clara, California, according to the details provided by the employer. Some roles may also include multiple work locations depending on the requirement.
What pay range can candidates expect for this role at Omnivision?
Candidates can expect a pay range of $156,853 and $160,000 per year.
What employment applies to this position at Omnivision?
Omnivision lists this role as a Full-time position.
What experience level is required for this role at Omnivision?
Omnivision is looking for a candidate with "Senior-level" experience level.
What education level is required for this job?
The education requirement for this position is Engineering (PE). Candidates with relevant qualifications or equivalent experience may also be considered.
What is the process to apply for this position at Omnivision?
You can apply for this role at Omnivision either through Sonara's automated application system, which helps you submit applications 10X faster with minimal effort, or by applying manually using the direct link on the job page.