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Sr. Asic Design Engineer

AmbarellaNew York City, NY

$135,000 - $170,000 / year

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Overview

Schedule
Full-time
Career level
Senior-level
Compensation
$135,000-$170,000/year

Job Description

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

Position Responsibilities:

  • Designing and implementing video compression, image processing, vector computation, and flexible compute systems optimized for future AI agents and large language model (LLM) inference-alongside processor cores and memory subsystems using System Verilog, with a focus on enabling next-generation edge AI markets such as automation, robotics, and intelligent low power embedded systems.
  • Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages.
  • Synthesize and optimize RTL for timing, area, and power.
  • Explore micro-architecture and architectural tradeoffs via quick modelling using scripting languages such as python, Perl etc.
  • Developing unit level test environments and tests cases
  • Developing front-end methodologies and tool flows.
  • Participating in chip bring-up and testing.
  • Analyzing and reviewing code coverage and functional coverage and providing recommendations to the verification team to address any gaps.

Requirements:

  • Master's degree in electrical/Electronics/Computer Engineering with 0-5 years of experience.
  • Good understanding of computer architecture, logic design and VLSI design.
  • Knowledge of System Verilog, Verilog, python, and Perl.
  • Knowledge of design verification, and functional coverage.
  • Ability to program in scripting languages and the ability to write assembly language programs.
  • Strong communication skills and a good team player.
  • Adept problem-solving abilities
  • Knowledge of logic synthesis and timing closer is a plus

The base salary range is $135,000 - $170,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The successful candidate will have the opportunity to convert to a full-time regular position. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits.

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FAQs About Sr. Asic Design Engineer Jobs at Ambarella

What is the work location for this position at Ambarella?
This job at Ambarella is located in New York City, NY, according to the details provided by the employer. Some roles may also include multiple work locations depending on the requirement.
What pay range can candidates expect for this role at Ambarella?
Candidates can expect a pay range of $135,000 and $170,000 per year.
What employment applies to this position at Ambarella?
Ambarella lists this role as a Full-time position.
What experience level is required for this role at Ambarella?
Ambarella is looking for a candidate with "Senior-level" experience level.
What is the process to apply for this position at Ambarella?
You can apply for this role at Ambarella either through Sonara's automated application system, which helps you submit applications 10X faster with minimal effort, or by applying manually using the direct link on the job page.