Ui Ux Design Jobs 2026 (Now Hiring) – Smart Auto Apply

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High-Speed Analog Layout Design Engineer

Celero Communications
San Jose, California

$200,000 - $250,000 / year

Principal High-Speed Analog Layout Design Engineer About the Role Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundari...

Posted today

Boeing logo

Gov Training- Hardware Design First Line Manager

Boeing
Oklahoma City, Oklahoma

$130,900 - $177,100 / year

Gov Training- Hardware Design First Line Manager Company: The Boeing Company The Boeing Global Services (BGS) Government Training Engineering (GTE) team in Oklahoma City is seeking...

Posted today

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Principal Physical Design Engineer

Celero Communications
Irvine, California

$200,000 - $300,000 / year

Senior/Principal Physical Design Engineer Core Responsibilities • RTL-to-GDSII Execution: Own physical implementation of System-on-Chips (SoCs) or complex digital blocks.• Design O...

Posted today

Groq logo

Sr./Staff Network Design Engineer, AI/HPC

Groq
San Francisco, California

$270,400 - $401,600 / year

About Groq Inference is the engine that powers AI, and Groq was built from the silicon up to deliver the world's fastest inference at scale. We pioneered the LPU—the first processo...

Posted today

ATOMS logo

Electrical Systems & Harness Design Engineer

ATOMS
Pittsburgh, Pennsylvania

$90,000 - $180,000 / year

Who we are Lab37 Robotics , is a technology company focused on the development and deployment of robots designed specifically for direct-to-customer food production. Our mission is...

Posted today

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Mechanical Engineer, Vehicle Integration & Product Design

Teleo
Palo Alto, CA
Teleo, a Havoc company, is a robotics company that transforms construction heavy equipment, including loaders, dozers, excavators, and trucks, into autonomous robots for commercial...

Posted today

Centrus Energy logo

Engineering Assistant Manager - Design

Centrus Energy
Oak Ridge, TN

$117,778 - $196,297 / year

Summary Centrus is seeking an Assistant Engineering Manager to help lead daily Design Engineering activities and provide continuity of leadership when the Engineering Manager is un...

Posted 2 weeks ago

General Motors logo

Technical Lead Manager, Sensing Systems Design & Validation

General Motors
Sunnyvale, CA

$189,300 - $290,700 / year

Job Description Work Arrangement: This role is categorized as Remote/hybrid. Remote: This role is based remotely but if you live within a 50-mile radius of [Austin, Detroit, Seattl...

Posted 5 days ago

Delve Underground logo

Cad/Bim - Design Technology Specialist II

Delve Underground
San Francisco, CA

$68,159 - $123,584 / year

About Delve Underground Delve Underground is a leader in underground and heavy civil engineering serving the transportation, water, wastewater, and energy industries. Specializing...

Posted 2 weeks ago

Ethan Allen logo

Interior Design Sales Professional - Sandy/Salt Lake City

Ethan Allen
Sandy, UT
Named America's #1 Premium Furniture Retailer by Newsweek, Ethan Allen is a leading interior design destination combining state-of-the-art technology with personal service. After m...

Posted 1 week ago

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Design Verification Engineer (Silicon Engineering)

Space Exploration Technologies
Palo Alto, CA

$135,000 - $155,000 / year

DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadb...

Posted 3 weeks ago

General Motors logo

Staff In House Design Technical Program Manager

General Motors
Warren, MI

$134,700 - $245,000 / year

Job Description The Role: The Technical Program Manager in the Software and Electronics (S&E) Program Management Office (PMO) is an individual contributor responsible for overseein...

Posted 30+ days ago

D.R. Horton, Inc. logo

Marketing And Design Coordinator - Sarasota Division

D.R. Horton, Inc.
Sarasota, FL
D.R. Horton, Inc. is currently looking for a Marketing and Design Coordinator. The right candidate is responsible for supporting the planning, coordination, and execution of digita...

Posted 1 week ago

ICF International, Inc logo

Department Manager: Physical Design Engineer

ICF International, Inc
Dallas, TX

$174,701 - $296,992 / year

Ready to make a difference? We are seeking a Department Manager, Substation Physical Engineering to lead and grow our substation engineering practice. In this leadership role, you...

Posted 4 days ago

Qorvo logo

Staff Analog IC Design Engineer

Qorvo
Richardson, TX

$144,300 - $187,600 / year

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global...

Posted 30+ days ago

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Design Engineer IV - Simulation

Mueller Water Products, Inc.
Chattanooga, TN

$94,067 - $129,329 / year

Who We Are: Thank you for your interest in Mueller Water Products, Inc. For more than 165 years, Mueller Water Products, Inc. has been building the future of water infrastructure....

Posted 30+ days ago

Nvidia logo

Lead Hardware Design Validation Engineer - Memory Subsystem

Nvidia
Santa Clara, CA

$168,000 - $322,000 / year

Widely considered to be one of the technology world's most desirable employers, NVIDIA is an industry leader with groundbreaking developments in High-Performance Computing, Artific...

Posted 30+ days ago

Kiewit logo

Mechanical Design Engineers-Kiewit Nuclear Solutions-Lenexa, KS, Houston, TX, Knoxville, TN, Itasca,

Kiewit
Lenexa, KS

$125,000 - $130,000 / year

Requisition ID: 180002 Job Level: Mid Level Home District/Group: Kiewit Nuclear Solutions Department: Design Engineering Market: Nuclear Employment Type: Full Time Position Overvie...

Posted 30+ days ago

E logo

Senior Civil Design Engineer

Ensafe Inc.
Pensacola, FL
Do you like working with different project teams in a fast-paced environment? Are you interested in joining an organization focused on making a positive impact? If so, we'd like to...

Posted 30+ days ago

Nvidia logo

Senior Asic Design Engineer - Clocks IP

Nvidia
Austin, TX

$136,000 - $218,500 / year

The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team collaborates with the...

Posted 2 weeks ago

C logo

High-Speed Analog Layout Design Engineer

Celero CommunicationsSan Jose, California

$200,000 - $250,000 / year

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Overview

Schedule
Full-time
Career level
Senior-level
Remote
On-site
Compensation
$200,000-$250,000/year
Benefits
Career Development

Job Description

Principal High-Speed Analog Layout Design EngineerAbout the Role Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure. As we scale rapidly, we are looking for a driven and resourceful High-Speed Analog Layout Engineer to be the backbone of our daily operations and a key partner in shaping our company culture. We are seeking a Principal/Senior Analog Layout Engineer to drive the layout design of complex analog and mixed-signal IP blocks that are at the heart of our advanced optical communication systems. As a key member of the Analog & Mixed-Signal (AMS) design team, you will lead layout development of critical blocks such as ADCs, DACs, PLLs, and other high-performance analog/mixed-signal circuits. You will interface closely with circuit designers, CAD/PDK teams, and other layout engineers to ensure first-pass silicon success. This is a hands-on technical role ideal for someone who thrives in a fast-paced environment and enjoys mentoring others while contributing directly to cutting-edge chip development.Key Responsibilities• Lead and own the physical layout design of complex analog/mixed-signal macros (e.g., ADCs, DACs, PLLs), from floor planning through final verification• Collaborate closely with schematic designers to create optimal layout solutions considering performance, matching, symmetry, and reliability• Mentor and guide junior layout engineers/contractors across multiple time zones, enforcing best practices in layout design and verification• Perform and debug full hierarchy LVS, DRC, PERC, ERC, and other signoff checks using industry-standard tools (Pegasus, Calibre, etc.)• Contribute to chip-level planning including top-level floor planning, block integration, power grid implementation, and signal routing• Participate in layout design reviews and provide technical leadership for layout quality, verification completeness, and schedule adherence• Support automation initiatives through scripting and tool customization (SKILL, TCL, Python is a plus)Required Qualifications• Minimum 10+ years of hands-on analog/mixed-signal layout design experience in advanced CMOS/FinFET technologies• Proven track record of top level integration IP layout macros and preparing IPs for handoff to Physical Design• Proven leadership in owning major IP layout macros or full-chip-level layout at FinFET nodes (TSMC preferred)• At least 1 year of experience with TSMC FinFET process nodes (N3, N5, N7, or N16)• Deep understanding of device physics, layout-dependent effects (LOD, WPE, OSE, LDE, etc.), and their impact on circuit performance• Strong expertise in layout best practices for device matching, noise isolation, ESD protection, symmetry, and parasitic minimization• Proficiency in floor planning, hierarchical block integration, routing strategy, and power/ground grid design• Expertise with Cadence Virtuoso, Calibre, Pegasus, and other layout and verification tools• Familiarity with layout verification flows, including LVS, DRC, PERC, Density, DFM, ERC, and Antenna rules• Experience working in collaborative environments with international and remote teams• Strong documentation and communication skills with the ability to clearly present layout trade-offs and status to cross-functional teams• Experience using revision control systems for layout design managementPreferred Qualifications• Exposure to optical or high-speed analog interfaces is a strong plus• Working knowledge of SKILL, TCL, or Python for layout automation or design flow optimization• Proven ability to collaborate with international teams (U.S., Canada, Argentina)• Strong organizational skills with high attention to detail and follow-through• Ability to multi-task and prioritize in a fast-paced, dynamic environment• Proactive, eager-to-learn mindset with excellent problem-solving skillsWhat We Offer• The chance to play a foundational role at a high-growth semiconductor start-up• Exposure to a wide variety of cross functional teams• A collaborative, international team culture where ideas and initiative are valued• The opportunity to grow alongside Celero as we scale and shape the future of our industry• A foundational role at a fast-growing semiconductor start-up shaping the future of AI and data center connectivity Annual Base Salary Range for US: $200,000 - $250,000 (The final offer will be determined based on job-related skills, experience, qualifications, and location.) celerocatsone

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